Understanding MIPS Pseudo-Instruction ble in Real MIPS Instructions

What does the MIPS pseudo-instruction ble Rs, Rt, Label translate to in real MIPS instructions?

a) bge Rs, Rt, Label
b) blt Rt, Rs, Label
c) bgt Rs, Rt, Label
d) blez Rs, Rt, Label

Final answer:

The MIPS pseudo-instruction 'ble Rs, Rt, Label' translates into a sequence of real MIPS instructions involving both 'slt' and conditional branches 'beq' and 'bne'. This sequence effectively emulates the 'branch if less than or equal to' logic.

In the MIPS architecture, certain pseudo-instructions like 'ble' do not have direct equivalents in the instruction set. Instead, they are translated into sequences of real MIPS instructions to achieve the desired logic. In this case, the 'ble' instruction is translated into a combination of 'slt', 'beq', and 'bne' instructions.

The translation process involves using the 'slt' instruction to compare the values in registers Rs and Rt. If Rs is less than Rt, a temporary register $at is set to 1, otherwise it is set to 0. Subsequently, the 'beq' instruction checks if $at is 0, indicating that Rs is greater than or equal to Rt. Finally, the 'bne' instruction checks if Rs is not equal to Rt, which will branch if Rs is strictly less than Rt.

Therefore, the sequence of MIPS instructions resulting from the pseudo-instruction 'ble Rs, Rt, Label' effectively captures the 'less than' and 'equal to' scenarios required for branching to the specified Label in the code.